| Application Deadline: Open Until Filled |
Job Location: Hillsboro |
| Date Posted: 11/19/2009 |
Hours Worked Per Week: 40 |
| Computer Skills: N/A
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Shift:
Day Shift
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| Occupational Skills: N/A |
Duration of Job: Either Full or Part Time, more than 6 months |
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| Job Summary: |
Title: Grad Intern: FPGA Engineer
Location: USA-Oregon, Hillsboro
Platform Validation Engineering (PVE) in Oregon is seeking a RTL Emulation Engineering Intern to work in a design validation team developing and supporting RTL emulation model for state-of-the-art Intel graphic products. This position emphasizes RTL and verification skills. In this position, your responsibilities will include but not be limited to:
- Analyzing and debugging RTL models on emulator
- Creating testbench, bus functional model and scripts
- Reviewing simulation results
- Performing emulation bringup
- Write technical documents and wiki pages
- Interfacing with post silicon validation and silicon design teams
You must be a graduate student in Electrical Engineering with a solid foundation in digital system design. Additional qualifications include:
- A good working knowledge of design and analysis of digital circuits
- Good lab skills, including (but not limited to) experience with computer motherboards, simulation software such as Modelsim, VCS, Debussy.
- A self starter who can work with minimal supervision in a team environment
- Strong verbal and written communication skills
- Knowledge of Verilog, System Verilog and/or VHDL
- Tcl/Perl scripting experience and/or Linux shell* programming would be an added advantage
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| Job Classification: Computer Hardware Engineers |
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| Compensation |
Salary: $0.00
per
Other
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| Job Requirements |
| Experience Required: At least 1 year |
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Education Required: Bachelors
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Minimum Age: N/A
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| Major: Electrical Engineering |
Gender: N/A
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